Instruction Set Architecture

Instruction Set Architecture (ISA)

Instruction Set Architecture: The machine language the CPU implements.

Note: Everything you need to know to program a computer

Machine Instructions

Machine Instruction: An instruction that is executed directly by the CPU.

Special Instruction Fields: Other special fields may be used under certain circumstances.

Note: How instructions fit on 32-bit MIPS.

General Purpose Registers (GPR)

Register File: Consists of all registers in the CPU that are accessible to the programmer.

One, Two Three-Address Machines (Instruction Formats)

Instruction Formats: Refer to the way instructions are encoded and represented in machine language.

Examples: Instruction formats in the real world

One, Two Three-Address Machines:

Note: Because we are working with registers, we need to break complex expressions down and handle the order of operations ourselves!

Computing the Number of Memory Accesses

The more memory accesses you do, the slower your code is.

How-To Count Memory Accesses for One Instruction:

  1. The instruction itself +1 to instruction count.
  2. Rewrite in register transfer notation.

Note: Assumptions
We (usually) make the following assumptions when computing the number of memory accesses:

  1. Each memory address requires one memory word
  2. Opcode, mode, immediate value, number of shifts, and any number of register addresses require only one memory word
Example: Three register-memory address machine with two registers
Instruction RTN Data Instruction
ADD R1,A,B R1 <- A + B 2 3
ADD R2,C,D R2 <- C + D 2 3
MUL X,R1,R2 X <- R1 * R2 1 2
Example: Three-register address machine with three registers
Instruction RTN Data Instruction
LD R1, A R1 <- A 1 2
LD R2, B R2 <- B 1 2
ADD R3, R1, R2 R3 <- R1 + R2 0 1
LD R1, C R1 <- C 1 2
LD R2, D R2 <- D 1 2
ADD R1, R1, R2 R1 <- R1 + R2 0 1
MUL R1, R1, R3 R1 <- R1 * R3 0 1
ST X, R1 X <- R1 1 2
Example: Zero-register address machine
Instruction RTN Data Instruction
PUSH A TOS <- A 1 2
PUSH B TOS <- B 1 2
ADD TOS <- TOS + TOS-1 0 1
PUSH C TOS <- C 1 2
PUSH D TOS <- D 1 2
ADD TOS <- TOS + TOS-1 0 1
MUL TOS <- TOS * TOS-1 0 1
POP X X <- TOS 1 2